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_______________general description maxim? redesigned dg411/dg412/DG413 analog switches now feature low on-resistance matching between switches (3 max) and guaranteed on-resis- tance flatness over the signal range ( d 4 max). these low on-resistance switches conduct equally well in either direction. they guarantee low charge injection, low power consumption, and an esd tolerance of 2000v minimum per method 3015.7. the new design offers lower off leakage current over temperature (less than 5na at +85?). the dg411/dg412/DG413 are quad, single-pole/sin- gle-throw (spst) analog switches. the dg411 is nor- mally closed (nc), and the dg412 is normally open (no). the DG413 has two nc switches and two no switches. switching times are less than 150ns max for t on and less than 100ns max for t off . these devices operate from a single +10v to +30v supply, or bipolar ?.5v to ?0v supplies. maxim? improved dg411/dg412/DG413 are fabricated with a 44v silicon- gate process. ________________________applications sample-and-hold circuits communication systems test equipment battery-operated systems heads-up displays pbx, pabx guidance & control systems audio signal routing military radios ______________________new features ? plug-in upgrade for industry-standard dg411/dg412/DG413 ? improved r ds(on) match between channels (3 max) ? guaranteed r flat(on) over signal range ( d 4 ) ? improved charge injection (10pc max) ? improved off leakage current over temperature (<5na at +85?) ? withstand electrostatic discharge (2000v min) per method 3015.7 __________________existing features ? low r ds(on) (35 max) ? single-supply operation +10v to +30v ? bipolar-supply operation ?.5v to ?0v ? low power consumption (35? max) ? rail-to-rail signal handling ? ttl/cmos-logic compatible ______________ordering information dg411/dg412/DG413 improved, quad, spst analog switches ________________________________________________________________ maxim integrated products 1 switches shown for logic "0" input dip/so dg412 logic switch 0 1 off on top view dip/so dg411 logic switch 0 1 on off dip/so DG413 logic switches 1, 2 0 1 on off switches 3, 4 off on 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 DG413 v l s3 d3 in3 in4 d4 s4 gnd 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 dg411 v l s3 d3 in3 in4 d4 s4 gnd 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 dg412 v l s3 d3 in3 in4 d4 s4 gnd _____________________pin configurations/functional diagrams/truth tables call toll free 1-800-998-8800 for free samples or literature. 19-4728; rev 2; 8/95 ordering information continued at end of data sheet. *contact factory for dice specifications. dice* 0? to +70? dg411c/d 16 narrow so 0? to +70? dg411cy 16 plastic dip 0? to +70? dg411 cj pin-package temp. range part
dg411/dg412/DG413 improved, quad, spst analog switches 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ual supplies (v+ = 15v, v- = -15v, v l = 5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: signals on s, d, or in exceeding v+ or v- are clamped by internal diodes. limit forward current to maximum current rating. voltage referenced to v- v+.........................................................................................44v gnd .....................................................................................25v v l .....................................................(gnd -0.3v) to (v+ +0.3v) digital inputs, v s , v d (note 1)........(v- -2v) to (v+ +2v) or 30ma (whichever occurs first) continuous current (any terminal) ......................................30ma peak current (pulsed at 1ms, 10% duty cycle max) ............................100ma continuous power dissipation (t a = +70?) 16-pin plastic dip (derate 10.53mw/? above +70?) .842mw 16-pin narrow so (derate 8.70mw/? above +70?) ...696mw 16-pin cerdip (derate 10.00mw/? above +70?)......800mw operating temperature ranges dg41_c_ ..............................................................0? to +70? dg41_d_ ...........................................................-40? to +85? dg41_ak_ .......................................................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? 17 30 a c, d -40 40 -10 10 -10 10 -0.25 -0.10 0.25 6 5 a a a t a = t min to t max t a = t min to t max c, d c, d c, d t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = +25? t a = +25? v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = 15.5v v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = 15.5v (note 3) v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = 15.5v v+ = 15v, v- = -15v, v d = ?0v, i s = -10ma v+ = 13.5v, v- = -13.5v, v d = ?.5v, i s = -10ma v+ = 15v, v- = -15v, v d = ?v, 0v, i s = -10ma conditions na -20 20 i d(on) + i s(on) drain-on leakage current (note 7) -0.4 -0.1 0.4 i d(off) na -5 5 drain-off leakage current (note 7) -5 5 na i s(off) source-off leakage current (note 7) -0.25 -0.10 0.25 4 r flat(on) on-resistance flatness (note 4) v -15 15 v analog analog signal range ? r ds(on) on-resistance match between channels (note 4) 3 17 45 45 r ds(on) drain-source on-resistance units min typ max (note 2) symbol parameter c, d, a c, d, a c, d, a switch
in = 2.4v, all others = 0.8v dg411/dg412/DG413 improved, quad, spst analog switches _______________________________________________________________________________________ 3 electrical characteristics?ual supplies (continued) (v+ = 15v, v- = -15v, v l = 5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) ns ns -5 5 t a = t min to t max -5 5 t a = t min to t max t a = +25? -5 5 t a = t min to t max -5 5 t a = t min to t max t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = +25? in = 0.8v, all others = 2.4v t a = +25? conditions t a = +25? -1 -0.0001 1 all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v pf 35 f = 1mhz, figure 8 c d(on) + c s(on) drain-on capacitance pf 9 f = 1mhz, figure 7 c d(off) drain-off capacitance pf 9 f = 1mhz, figure 7 c s(off) source-off capacitance db 85 r l = 50 , c l = 5pf, f = 1mhz, figure 6 crosstalk (note 6) db 68 r l = 50 , c l = 5pf, f = 1mhz, figure 5 oirr off isolation (note 5) pc 510 c l = 1.0nf, v gen = 0v, r gen = 0 , figure 4 q charge injection (note 3) ns 25 DG413 only, r l = 300 , c l = 35pf, figure 3 t d break-before-make time delay v d = ?0v, figure 2 v d = ?0v, figure 2 160 t off turn-off time 100 145 220 t on turn-on time ? -0.500 0.005 0.500 i inh 110 175 input current with input voltage high -1 -0.0001 1 ? i gnd ground current ? -1 0.0001 1 i l logic supply current ? -1 0.0001 1 i+ positive supply current ? ? -0.500 0.005 0.500 i inl input current with input voltage low all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v v i- negative supply current ?.5 ?0.0 power-supply range units min typ max (note 2) symbol parameter input supply dynamic
dg411/dg412/DG413 improved, quad, spst analog switches 4 _______________________________________________________________________________________ electrical characteristics?ingle supply (v+ = 12v, v- = 0v, v l = 5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) note 2: the algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. note 3: guaranteed by design. note 4: ? r on = ? r on max - ? r on min. on-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. flatness is defined as the difference between the maximum and minimum value of on resistance as measured at the extremes of the specified analog signal range. note 5: off isolation = 20 log (v d/ v s ) , v d = output, v s = input to off switch. see figure 5. note 6: between any two switches. see figure 6. note 7: leakage parameters i s(off) , i d(off) , and i d(on) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25?. -5 5 t a = +25? t a = t max -5 5 t a = t max -5 5 t a = t max 315 t a = t min to t max -5 5 t a = t max t a = +25? t a = +25? t a = t min to t max t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? t a = t min to t max conditions pc 510 c l = 1.0nf, v gen = 0v, r gen = 0v, figure 8 q charge injection (note 3) ns 25 DG413 only, r l = 300 , c l = 35pf, figure 3 t d break-before-make time delay v s = 8v, figure 2 v s = 8v, figure 2 all channels on or off, v l = 5.25v, v in = 0v or 5v all channels on or off, v+ = 13.2v, v in = 0v or 5v all channels on or off, v l = 5.25v, v in = 0v or 5v all channels on or off, v+ = 13.2v, v in = 0v or 5v v+ = 10.8v, v d = 3.8v, i s = -10ma ns 140 t off turn-off time 40 80 95 125 t on ns 175 250 v 012 v analog turn-on time ? -1 -0.0001 1 i gnd analog signal range ground current ? -1 0.0001 1 i- negative supply current ? -1 0.0001 1 i l ? -1 0.0001 1 i+ positive supply current logic supply current 100 r ds(on) drain-source on resistance units min typ max (note 2) symbol parameter switch supply dynamic (note 3)
dg411/dg412/DG413 improved, quad, spst analog switches _______________________________________________________________________________________ 5 60 -20 -10 10 on-resistance vs. v d and power-supply voltage 0 40 dg411-01 v d (v) r ds(on) (w) 020 20 50 30 10 70 a b c d a: v+ = 5v, v- = -5v b: v+ = 10v, v- = -10v c: v+ = 15v, v- = -15v d: v+ = 20v, v- = -20v 0 -20 -10 10 on-resistance vs. v d and temperature 50 dg411-02 v d (v) r ds(on) (w) 020 30 10 40 20 60 v+ = 15v v- = -15v t a = +125? t a = +85? t a = +25? t a = -55? 20 05 15 on-resistance vs. v d and temperature (single supply) 120 dg411-03 v d (v) r ds(on) (w) 10 20 80 40 100 60 140 v- = 0v v+ = 5v v+ = 10v v+ = 15v v+ = 20v 160 20 05 15 on-resistance vs. v d (single supply) 70 dg411-04 v d (v) r ds(on) (w) 10 20 50 30 60 40 80 v+ = 12v v- = 0v t a = +125? t a = +85? t a = +25? 0.0001 -55 off leakage currents vs. temperature 10 dg411-05 temperature (?) off leakage (na) +25 +125 0.1 0.001 1 0.01 100 v+ = 16.5v v- = -16.5v v d = ?5v v s = 15v 0.0001 -55 on leakage currents vs. temperature 10 dg411-06 temperature (?) on leakage (na) +25 +125 0.1 0.001 1 0.01 100 v+ = 16.5v v- = -16.5v v d = ?5v v s = ?5v __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.) -60 -20 charge injection vs. analog voltage 40 dg411-07 v d (v) q (pc) 020 0 -40 20 -20 60 -15 -10 -5 5 10 15 v+ = 15v v- = -15v v l = 5v cl = 1nf 0.0001 -55 supply current vs. temperature 10 dg411-08 temperature (?) i+, i-, i l ( m a) +25 +125 0.1 0.001 1 0.01 100 a: i+ at v+ = 16.5v b: i- at v- = -16.5v c: i l at v l = 5v a b c
dg411/dg412/DG413 improved, quad, spst analog switches 6 _______________________________________________________________________________________ __________applications information operation with supply voltages other than 15v using supply voltages other than 15v will reduce the analog signal range. the dg411/dg412/DG413 switch- es operate with ?.5v to ?0v bipolar supplies or with a +10v to +30v single supply; connect v- to 0v when operating with a single supply. also, all device types can operate with unbalanced supplies such as +24v and -5v. v l must be connected to +5v to be ttl com- patible, or to v+ for cmos-logic level inputs. the typical operating characteristics graphs show typical on-resistance with ?5v, ?0v, and ?v supplies. (switching times increase by a factor of two or more for operation at ?v.) overvoltage protection proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maxi- mum ratings because stresses beyond the listed rat- ings may cause permanent damage to the devices. always sequence v+ on first, followed by v l , v-, and logic inputs. if power-supply sequencing is not possi- ble, add two small, external signal diodes in series with supply pins for overvoltage protection (figure 1). adding diodes reduces the analog signal range to 1v below v+ and 1v below v-, without affecting low switch resistance and low leakage characteristics. device operation is unchanged, and the difference between v+ and v- should not exceed +44v. v+ s v- d v g v+ v- figure 1. overvoltage protection using external blocking diodes ______________________________________________________________pin description positive supply-voltage input?onnected to substrate v+ 13 logic supply voltage v l 12 ground gnd 5 negative supply-voltage input v- 4 pin analog-switch source terminal s1-s4 3, 14, 11, 6 analog-switch drain terminal d1-d4 2, 15, 10, 7 inputs in1-in4 1, 16, 9, 8 function name
dg411/dg412/DG413 improved, quad, spst analog switches _______________________________________________________________________________________ 7 t r < 20ns t f < 20ns 50% 0v logic input v- -15v r l 300 w d1 gnd c l includes fixture and stray capacitance. v out = v s ( r l ) r l + r ds(on) switch input in1 +3v t off 0v switch output 0.9 x v out 0.9 x v out t on v out switch output logic input logic input waveforms inverted for switches that have the opposite logic sense. v l v+ c l 35pf +5v +15v v out s1 0v repeat test for in and s, for load conditions, see electrical characteristics. dg411 dg412 DG413 50% 0.9 x v out1 +3v 0v 0v logic input switch output 2 (v o2 ) 0v 0.9 x v out2 t d t d logic input v- -15v r l2 gnd c l includes fixture and stray capacitance. s2 in v l s1 v out2 v+ +5v +15v c l2 v s1 = +10v v s2 = +10v r l1 v out1 c l1 r l = 300 w c l = 35pf d1 d2 switch output 1 (v o1 ) DG413 figure 2. switching-time figure 3. DG413 break-before-make ______________________________________________timing diagrams/test circuits v gen gnd d c l v out -15v v- v+ v out in off on off d v out q = ( d v out )(c l ) s +5v in depends on switch configuration; input polarity determined by sense of switch. off on off in v in = +3v +15v r gen in v l dg411 dg412 DG413 figure 4. charge-injection
dg411/dg412/DG413 improved, quad, spst analog switches 8 _______________________________________________________________________________________ figure 6. crosstalk in 0v or 2.4v signal generator +15v c v l analyzer d r l gnd s c -15v v- +5v v+ dg411 dg412 DG413 signal generator 0dbm +15v c analyzer d r l gnd s c v- -15v 0v or 2.4v in1 d 50 w v l s +5v in2 0v or 2.4v v+ dg411 dg412 DG413 figure 5. off-isolation _________________________________timing diagrams/test circuits (continued) capacitance meter d s gnd c v- -15v in 0v or 2.4v c +15v v l +5v f = 1mhz v+ dg411 dg412 DG413 capacitance meter d s gnd c v- -15v in 0v or 2.4v c +15v v l +5v f = 1mhz v+ dg411 dg412 DG413 figure 7. channel-off capacitance figure 8. channel-on capacitance
dg411/dg412/DG413 improved, quad, spst analog switches _______________________________________________________________________________________ 9 __ordering information (continued) ___________________chip topography s3 s4 d3 0.097" (2.46mm) 0.080" (2.03mm) v- gnd d4 in4 in3 v l v+ s2 d1 in1 in2 s1 d2 transistor count: 136 substrate connected to v+ pin-package temp. range part 16 narrow so -40? to +85? dg411dy 16 plastic dip -40? to +85? dg411dj 16 cerdip** -55? to +125? dg411ak 16 cerdip -40? to +85? dg411dk 16 narrow so -40? to +85? dg412dy 16 plastic dip -40? to +85? dg412dj 16 cerdip** -55? to +125? dg412ak 16 cerdip -40? to +85? dg412dk dice* 0? to +70? dg412c/d 16 narrow so 0? to +70? dg412cy 16 plastic dip 0? to +70? dg412 cj 16 narrow so -40? to +85? DG413dy 16 plastic dip -40? to +85? DG413dj 16 cerdip** -55? to +125? DG413ak 16 cerdip -40? to +85? DG413dk dice* 0? to +70? DG413c/d 16 narrow so 0? to +70? DG413cy 16 plastic dip 0? to +70? DG413 cj * contact factory for dice specifications. **contact factory for availability and processing to mil-std-883b.
dg411/dg412/DG413 improved, quad, spst analog switches 10 ______________________________________________________________________________________ ________________________________________________________package information c a a2 e1 d e e a e b a3 b1 b dim a a1 a2 a3 b b1 c d d1 e e1 e e a e b l a min ? 0.015 0.125 0.055 0.016 0.050 0.008 0.745 0.005 0.300 0.240 ? 0.115 0? max 0.200 ? 0.150 0.080 0.022 0.065 0.012 0.765 0.030 0.325 0.280 0.400 0.150 15? min ? 0.38 3.18 1.40 0.41 1.27 0.20 18.92 0.13 7.62 6.10 ? 2.92 0? max 5.08 ? 3.81 2.03 0.56 1.65 0.30 19.43 0.76 8.26 7.11 10.16 3.81 15? inches millimeters 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc a1 l d1 e 21-587a a 16-pin plastic dual-in-line package
dg411/dg412/DG413 improved, quad, spst analog switches ______________________________________________________________________________________ 11 l dim a a1 b c d e e h h l a min 0.053 0.004 0.014 0.007 0.386 0.150 0.228 0.010 0.016 0? max 0.069 0.010 0.019 0.010 0.394 0.157 0.244 0.020 0.050 8? min 1.35 0.10 0.35 0.19 9.80 3.80 5.80 0.25 0.40 0? max 1.75 0.25 0.49 0.25 10.00 4.00 6.20 0.50 1.27 8? inches millimeters a 16-pin plastic small-outline (narrow) package h e d e a a1 c h x 45? 0.127mm 0.004in. b 1.27 bsc 0.050 bsc 21-588b ___________________________________________package information (continued)
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1995 maxim integrated products printed usa is a registered trademark of maxim integrated products. dg411/dg412/DG413 improved, quad, spst analog switches ___________________________________________package information (continued) c a d b1 b dim a b b1 c d e e1 e l l1 q s s1 a min ? 0.014 0.038 0.008 ? 0.220 0.290 0.125 0.150 0.015 ? 0.005 0? max 0.200 0.023 0.065 0.015 0.840 0.310 0.320 0.200 ? 0.060 0.080 15? min ? 0.36 0.97 0.20 ? 5.59 7.37 3.18 3.81 0.38 ? 0.13 0? max 5.08 0.58 1.65 0.38 21.34 7.87 8.13 5.08 ? 1.52 2.03 15? inches millimeters 2.54 bsc 0.100 bsc q l s1 e 21-590b 16-pin ceramic dual-in-line package a s l1 e e1

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